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TEST GENERATION OF CROSSTALK DELAY FAULTS IN VLSI CIRCUITS IBD

M C BHUVANESWARI / M CBHUVANESWARI / S JAY
SPRINGER
10 / 2018
9789811324925
Inglês

Sinopse

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.